ATMEGA169P-16MCHR【PDF 77/274 页】MCU AVR 16KB FLASH 16MHZ 64-VQFN

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Sheet目录3753

73页 74页 75页 76页 [77页]78页 79页 80页 81页

PIC16F946

DS41265A-page 166

Preliminary

2005 Microchip Technology Inc.

REGISTER 14-1:

SSPSTAT – SYNC SERIAL PORT STATUS REGISTER (ADDRESS 94h)

R/W-0

R-0

SMP

CKE

D/A

R/W

bit 7

bit 0

bit 7

SMP: SPI Data Input Sample Phase bit

SPI Master mode:

= Input data sampled at end of data output time

= Input data sampled at middle of data output time (Microwire)

SPI Slave mode:

SMP must be cleared when SPI is used in Slave mode

I2C mode:

This bit must be maintained clear

bit 6

CKE: SPI Clock Edge Select bit

SPI mode, CKP = 0:

= Data transmitted on falling edge of SCK

= Data transmitted on rising edge of SCK (Microwire alternate)

SPI mode, CKP = 1:

= Data transmitted on rising edge of SCK

= Data transmitted on falling edge of SCK (Microwire default)

I2C mode:

This bit must be maintained clear

bit 5

D/A: Data/Address bit (I2C

mode only)

= Indicates that the last byte received or transmitted was data

= Indicates that the last byte received or transmitted was address

bit 4

P: Stop bit (I2C mode only)

This bit is cleared when the SSP module is disabled, or when the Start bit is detected last.

SSPEN is cleared.

= Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)

= Stop bit was not detected last

bit 3

S: Start bit (I2C mode only)

This bit is cleared when the SSP module is disabled, or when the Stop bit is detected last.

SSPEN is cleared.

= Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)

= Start bit was not detected last

bit 2

R/W: Read/Write bit Information (I2C mode only)

This bit holds the R/W bit information following the last address match. This bit is only valid from

the address match to the next Start bit, Stop bit or ACK bit.

= Read

= Write

bit 1

UA: Update Address bit (10-bit I2C mode only)

= Indicates that the user needs to update the address in the SSPADD register

= Address does not need to be updated

bit 0

BF: Buffer Full Status bit

Receive (SPI and I2C modes):

= Receive complete, SSPBUF is full

= Receive not complete, SSPBUF is empty

Transmit (I2C mode only):

= Transmit in progress, SSPBUF is full

= Transmit complete, SSPBUF is empty

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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